此论文为收费论文服务。具体请咨询QQ:75931341,优惠提供毕业论文。
摘 要：为了能够通过模拟电视显示数字视频，本文设计了PAL/NTSC数字视频编码芯片。该芯片主要对满足ITU656标准数字视频信号进行编码，产生满足PAL/NTSC制式的模拟视频信号，最后通过CVBS或S-Video端口连接到模拟电视显示。本文首先介绍电视原理、制式及相关标准，然后阐述系统的总体方案设计以及各模块的算法分析与设计。重点描述ITU656数据分离模块和色度副载波产生模块的设计、VerilogHDL实现以及基于Modelsim的仿真。同时，对色度副载波产生模块进行了FPGA验证。仿真中需要的数据通过Matlab工具产生。仿真和验证结果表明，ITU656数据分离模块和色度副载波产生模块能够满足设计要求，对色度副载波产生模块采用1/4压缩算法，节省大量存储资源。
关键词： PAL；NTSC；ITU656；数字视频；编码；VerilogHDL
Algorithm Design and Simulation of PAL / NTSC
Abstract: In order to display digital video through the analogue TV，this paper describes the design of the PAL/ NTSC Digital Video Encoder Chip．The chip encodes the ITU656 standard digital video signal and generates analogue television signal that meets the PAL/NTSC system. Finally, the analogue television signal connected to analogue TV to display through CVBS or S-Video interface．This paper introduces the principle of television, the TV system and related standards, then describes the whole system design of the Chip,analysis and designs algorithm of the chip’s modules．It was described with emphasis the design of ITU656 data separation module and color subcarrier generation module, VerilogHDL achievement and Modelsim simulation．color subcarrier generation module was verified by FPGA．The data used to simulate was generated by Matlab．The results of simulation and verification indicate that ITU656 data separation module and color subcarrier module can meet the design requirements, and the color subcarrier generation module using 1/4 compression algorithm can save a lot of storage resources．
Keywords: PAL, NTSC, ITU656, digital video, encode, VerilogHDL.
