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摘要：
数字信号处理在科学和工程技术许多领域中得到广泛的应用，与FIR数字滤波器相比，IIR数字滤波器可以用较低的阶数获得较高的选择性，故本课题采用一种基于FPGA的IIR数字滤波器的设计方案,首先分析了IIR数字滤波器的原理及设计方法，然后通过Matlable的设计平台，采用模块化设计思想将整个IIR数字滤波器分为：时序控制、延时、补码乘加和累加四个功能模块。分别对各模块采用VHDL进行描述后，进行了仿真和综合。然后用数字技术进行处理，最后还原成模拟信号。仿真结果表明，本课题所设计的IIR数字滤波器运算速度较快,系数改变灵活，有较好的参考价值，预滤波器的作用是将输入信号中高于折叠频率（采样频率的一半）的分量加以滤除，然后在A/D转换器中每隔T秒（采样周期）进行一次采样得到数字信号。
关键词：电子设计自动化 采样周期 硬件描述语言
Title The Design For IIR Digital Filter Based On FPGA
Abstract：
Digital signal processing is widely used in lots of fields, such as in science and project technique. Compared with FIR digital filter, IIR digital filter can get high selectivity with low factorial. A kind of IIR digital filter design method was introduced in the paper, which is based on FPGA. By used the design plant of MATLAB, we adopt blocking method named “Top-down ” and divide the entire IIR digital filter into four blocks, which are Clock control, Time delay, Multiply-addition and Progression. After described with VHDL, we do emulate and synthesis to each block. The result shows that, the introduced IIR digital filter runs fast, and the coefficient changes agility. It has high worth for consulting.
The numerical signal handles system of basic constitute. Then carry on a processing with the numerical technique, restore emulation signal finally. Imitate true result express, the IIR designed by this topic numerical filter operation speed more quick, coefficient change vivid, there is better reference value, the function which prepares a filter is importation signal in high in fold frequency(sample frequency of half) of the weight take in to filter in addition to, then separate T second(sample period) to carry on a sample to get numerical signal each time in the A/D the conversion the machine..
Key Words：Electronic Design Automation Sample frequency very High Speed Integrated Circuit Hardware Description Language (VHDL)
